New Flash Technology Developed

Scientists in Japan have developed a new form of flash memory which promises much longer lifetimes, can be operated at lower voltages, and can be fabricated on smaller transistor sizes.

The new breakthrough relies on using Ferroelectric Gate Field-Effect Transistors, known as FeFETs, to store information instead of traditional Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETS).

Commercialization is expected in "several years," years which may or may not come in groups of three to five.

Teams from the Engineering wing of the University of Tokyo and the National Institute of Advanced Industrial Science and Technology, both in Japan, collaborated on the groundbreaking work, which they say will allow continuing development of flash memory as well as providing groundbreaking durability improvements.

The new flash cells, operating on a different physical basis from current technology, have demonstrated a durability of 10 million write and erase cycles, whereas current NAND products are typically rated in the tens or hundreds of thousands of cycles.

In addition, the new cells have, the team claims, a longer static durability; they retain information for longer periods, up to ten years.

Coupled with effective wear-leveling algorithms, these improvements may allow ferroelectric NAND flash to last through 100 years or more of active use without failure.

The new devices also run at a different voltage from ordinary flash; 6V instead of 20V. This has driven some publications to breathlessly report that power consumption has been reduced by a factor of three, but it is not at all clear this is so.

The Japanese team didn't specify power requirements, and the lower voltage may be accompanied by higher current requirements, so the impact on power consumption of the new technology is unknown.

The lower voltage may make the devices easier to build by minimizing power transforming complexity; if future Ferro-flash can run at 5V, no transformation would be required from, for instance, power supplied by a USB bus or a computer power supply's 5V line.

Current MOSFET NAND flash will, the team claims, run into scaling difficulties at the 20nm level, which could mean that a process size wall could threaten development within the next five years.

The new process will, they claim, scale down to 10nm or less without losing reliability, making the new technology essential to the continuing development of flash.

Since Intel's main manufacturing is already on 45nm, with 32nm in the wings, this may make the switchover very urgent indeed.

There is no news on the effects of the new technology on the speed or latency of flash devices, or on its cost to manufacture commercially.

These factors will be critical to its further development and eventual commercial deployment.

If the technology works as its inventors predict, and can be commercialized at prices meeting or undercutting MOSFET flash, this new technology could do much to eliminate reliability concerns about SSDs.

Indeed, if the promise of this technology is borne out, a switch to Ferroelectric Flash could do for SSD what GMR heads did for hard disks.

Story source: arstechnica.com